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<H4>PiSMA Architecture Research Group</H4>
<H5>Dept. of Computer Engineering & Informatics <BR>Univercity of Patras, Greece </H5>
<H2><U>The P<FONT COLOR="#7F0000">i</FONT>SMA Home Page</U></H2>
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<FONT SIZE=+1><B>P<FONT COLOR="#7F0000">i</FONT>SMA</B></FONT> (
<FONT SIZE=+1><B>P</B></FONT>arallel V<FONT SIZE=+1 COLOR="#7F0000"><B>i</B></FONT>rtually
<FONT SIZE=+1><B>S</B></FONT>hared-<FONT SIZE=+1><B>M</B></FONT>emory <FONT SIZE=+1><B>A</B></FONT>rchitecture ) is a
new parallel multiprocessor architecture combining the best of <B>shared</B> and <B>distributed</B> memory designs.
The result is a very <B>scalable</B> design (up to 100's of processors) without bus bottleneck problems
due to its distributed memory scheme, being at the same time <B>easily programmable</B>, as a partial
shared memory design.
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PiSMA related topics available:<BR>
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<DD><IMG src="schess.gif" width="16" height="16"> An <A HREF="pismadoc.html">illustrated description</A> of the PiSMA Architecture.</DD>
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<DD><IMG src="schess.gif" width="16" height="16"> <A HREF="pismaref.html">Papers and Publications</A> on PiSMA architecture.</DD>
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